city · verified active inventory
7 verified active engineering occupations jobs in South San Francisco. Every role links to its existing canonical PAIGE job page.
This is a directory page, not a job posting. It carries no JobPosting schema. A verified HTTP 200 job link does not independently prove that an employer is still accepting applications.
Showing 7 of 7 active roles. Search all matching jobs.
| Role | Employer | Location | Advertised pay |
|---|---|---|---|
| Analog IC Layout Engineer | neuralink | South San Francisco, California, United States | $83,000 |
| Analog and Mixed-Signal IC Design Engineer Intern | neuralink | South San Francisco, California, United States | $35 |
| Digital IC Design Engineer Intern | neuralink | South San Francisco, California, United States | $35 |
| Digital Verification Engineer | neuralink | South San Francisco, California, United States | $131,000 |
| Facilities Mechanical Specialist | neuralink | South San Francisco, California, United States | $34.62 |
| Machine Learning Engineer Intern | neuralink | South San Francisco, California, United States | $35 |
| Supplier Industrialization Engineer | neuralink | South San Francisco, California, United States | $68,000 |
7 active jobs include advertised pay evidence. Currency and pay period are preserved as observed; no conversion, annualization or imputation was performed.
Records are drawn from the PAIGE canonical occupation inventory and canonical job registry. Counts are the verified active inventory observed on 2026-11-05. Salary figures are advertised/observed values, not a statistically representative survey. No vacancy, salary, skill, employer identity or translation was invented. Pages below the substantive-content threshold are not published and remain NOINDEX.